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Researchers enhance spintronics using graphene


Post Date: 11 Apr 2015    Viewed: 348

It’s become increasingly clear in recent years that current methods of scaling and developing next-generation computer processors aren’t capable of restoring historic trends. While work continues on extending current technologies, many researchers and corporations have turned their attention to alternate methods and concepts for computing. One such alternative is spintronics — and while it’s proven exceedingly difficult to adapt for computer processors, new data suggests graphene might hold the key to solving some of these problems.

What is spintronics?

Spintronics is a portmanteau that means “spin transport electronics.” Traditional transistors rely on electrical states to perform calculations — a 0 is “off” and a 1 is “on.” As process nodes have gotten smaller, it’s become increasingly difficult to prevent electric current from leaking across a transistor that’s supposed to be off, while fundamental limits to voltage scaling prevent us from building transistors that continue to use less power.

Electrons, however, don’t just carry a charge — they also spin. In current transistor designs, this spin state is ignored — but it doesn’t have to be. The goal of spintronics is to create reliable methods of setting and communicating electron spin states in order to use them to perform computation. Instead of communicating charge state with a zero or one, spintronic devices could communicate whether an electron is “spin up” or “spin down.”

In theory, such designs could completely reshape the computing industry. There’d be no need to push forward to ever-smaller process geometries, while simultaneously trying to control for the substantial negative effects of moving to lower nodes. Unfortunately, it’s proven very difficult to adapt spintronics to logic processors (think CPUs). Current attempts to build such systems have run into numerous difficulties — but graphene could solve two of them.

Researchers at the Chalmers University of Technology have shown that graphene’s electrical and physical characteristics could make it ideal for spintronic devices for two reasons. First, graphene can apparently maintain the electrons with their spin intact — an exceedingly important characteristic, since digital computers rely on precision and the ability to repeat calculations. Second, it can transmit that information through channels up to 16 micrometers long and maintain aligned spin durations for up to a nanosecond.

That’s not necessarily enough for mainstream computing — while a modern 4GHz CPU performs a cycle every 0.25ns, many operations take more than one nanosecond — but it’s a step towards bringing the capability to market. The Chalmers team notes that theirgraphene production methods are far from perfect, with a number of wrinkles, defects, and roughness. But they said chemical vapor deposition could allow for wider industrial production. Mass production of graphene has proven to be an exceptionally difficult nut to crack — to date, no one has found a method of building graphene in the kinds of volume and precise needs of the semiconductor industry.

Not just reinventing the wheel

One interesting emphasis in the Chalmers’ data is that the researchers aren’t really trying to apply new technological concepts to traditional semiconductor manufacturing. Instead, the team wants to find an entirely new method of performing logical operations.

This is likely the better path to take — graphene has proven extremely difficult to integrate into CMOS manufacturing, as has the previous star material, carbon nanotubes. Many research teams and design firms trumpet easy CMOS integration when they debut new products. But the fact is, existing CMOS manufacturing is exceedingly well-optimized. Technologies like EUV (extreme ultraviolet lithography) have struggled partly because the industry continues to develop new alternative methods of extending 193nm lithography, thereby pushing out the specs EUV must hit to be viable.

At the same time, however, general industry agreement is that conventional CMOS will stop scaling at some point below 7nm, or simply become uneconomical to adopt. Cutting-edge research into alternative computing techniques is therefore a necessity — even if those research projects often involve materials or capabilities we can’t yet use effectively. 


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