Silicon carbide device start-up powers ahead in Coventry
Post Date: 13 Jun 2015 Viewed: 331
Coventry-based start-up Anvil Semiconductors is developing power diodes, power mosfets and perhaps LEDs using a novel silicon carbide (SiC) process technology.
The company’s technique is to deposit SiC with a “3C” crystal structure on a silicon wafer, in effect SiC-on-silicon.
Transistors made from SiC and gallium nitride (GaN) are being proposed as alternatives to silicon in power applications because they can switch much faster, increasing efficiency and allowing magnetics to be shrunk, and have inherently better voltage capabilities.
However, getting semiconductor-ready SiC and GaN, where few crystal defects are tolerated, continues to be, a headache.
“Some years ago, people tried to make 3C and didn’t succeed. They gave up, and Rohm, Cree and Infineon went for ‘4H’ instead,” Anvil CEO Jill Shaw told Electronics Weekly.
3C?
3C SiC has a cubic structure, compared to the 4H hexagonal structure. The bandgaps differ considerably 2.3eV and 3.2eV respectively. 6H SiC also exists, at 3eV.
Unsurprisingly, Shaw is an advocate of 3C SiC.
In transistors, “3C R(on)/mm2 is intrinsically better than 4H, also 3C R(on) does not increase so much with temp,” said Shaw.
In fact, performance does not vary with temperature, but in 4H and GaN it does.
On resistance (R(on))of transistors is a critical parameter, where lower R(on) means better efficiency and less heat.
Familiar silicon power transistors are naturally ‘off’ (‘normally-off’) until turned on, which means a failure in drive circuits results in shut-down.
With naturally-on transistors – simple SiC and GaN JFETs for example – drive failure means uncontrolled output current, and a negative gate voltage is needed to turn them off.
There are normally-off SiC and GaN transistors, but even these tend to need a bipolar gate drive to get the best out of them – they cannot easily be driven by chips designed for silicon power transistors.
Shaw is aiming to produce normally-off SiC mosfets.
“Mosfet from 3C SiC are normally-off – intrinsically,” she said. “We never expect to need a negative gate voltage, Negative drive is a function of poor 4H SiC mosfets, it is one of the physics limitations of 4H.”
Anvil uses CVD (chemical vapour deposition) to create its 3C epitaxy on silicon wafers.
To relieve stresses which would otherwise create dislocations as well as curling the wafer, its surface is divided into squares that will that later correspond to the scribe lines that will separate one transistor from the next.
“We put an oxide grid on the silicon before we put SiC on, and end up with single crystal silicon carbide on the square. Multi-crystal silicon carbide forms on the oxide, which can’t transmit stress,” said Shaw.
The high temperatures necessary for processing 4H SiC are not required in growing 3C. Anvil is making its diodes in a CMOS fab, with the addition of an anneal that is slightly hotter than used for CMOS.
At the moment, Nordstel in Sweden is doing the epitaxy using Anvil’s process, creating SiC around 10µm thick on 100mm wafers, with migration to 150mm expected.
In approximate figures, a 2.5mm grid will yield 15A devices, and 10x10mm will be possible although, as scaling is not quite linear, these devices would carry less than 240A.
There is a limit to maximum SiC thickness using the Anvil process. “We are aiming for around 1,200V. That is the minimum for 4H because not financially viable below,” said Shaw, so there is not much overlap.
If it works, 3C grown on silicon should be cheaper that 4H SiC grown on SiC substrates – Shaw estimates the substrate difference to be $30 against $1,000.
It competitor is likely to be GaN-on-silicon, which is going to have loosely similar production costs and voltage range, although GaN devices are lateral (not through the wafer like the proposed 3C mosfets) and normally-on – although this last GaN disadvantage can be ameliorated by cascode connection with a cheap low-voltage silicon mosfet.
“GaN-on-Si has started at much lower voltage and is working up. Can it get to 650V? Probably, but not above,” said Shaw, adding that plenty of people are talking about making high voltage GaN transistors but, “try to buy one over 650V”.
Anvil has not yet made mosfets, only Schottky diodes using the Tyndall National Institute in Cork as a fab.
“We are just getting up to 650V with Schottky diodes. We are talking about a diode in Q3, and transistors [mosfets] about six months later,” said Shaw. “Although we haven’t produced a mosfet yet, we have been doing a fab of critical areas, and we also have an oxide.”
Gate oxides for SiC mosfet have not always been successful.
Better green LEDs
With cubic SiC available, it was pointed out to Anvil that they had a surface on which cubic GaN could be grown for LEDs. And that cubic GaN might be the answer to the ‘green gap’ – the range of wavelengths for which existing semiconductors are uniquely inefficient.
“The availability of cubic GaN has the potential to remove the strong internal electric fields which plague conventional green LEDs and which impair recombination and make it difficult to address high internal quantum efficiency,” said Anvil. “Additionally, cubic GaN has a narrower bandgap and improved p-type electrical properties compared to hexagonal GaN normally used for LEDs.”
Professor Colin Humphries of the University of Cambridge’s LED lab, funded by Innovate UK, has used MOCVD to grow cubic GaN on Anvil 3C SiC, and grown multiple quantum wells. Although this is not yet thick enough for LEDs, according to Shaw.
Testing indicates the wells show promise for light emission.
One of Humphries’ specialities is lattice-matching buffer layers, and he thinks he has a technique that will sufficiently relieve the stress between GaN and SiC to make LEDs, but it remains to be tested.